bus error การใช้

• Bus errors may also be raised for certain other paging errors; see below.
• If the transfer cannot complete, it can pull the " bus error " line low.
• Attempting to access a unit larger than a byte at an unaligned address can cause a bus error.
• The default action for a segmentation fault or bus error is abnormal termination of the process that triggered it.
• To prevent bus errors, the chassis has three pins in each slot which correspond with the line card.
• On POSIX-compliant platforms, bus errors usually result in the SIGBUS signal being sent to the process that caused the error.
• If the problem is not an invalid logical address but instead an invalid physical address, a bus error is raised instead, though these are not always distinguished.
• The Bus Error and Address Error exceptions push a large amount of internal state onto the supervisor stack in order to facilitate recovery, and the MOVE from SR instruction was made privileged.
• The Debugging and remote debugging capabilities were also improved due to the extended debug information which was available in case of a crash ( Segmentation fault, bus error, or similar ).
• The 68000 does provide a bus error exception which can be used to trap, but it does not save enough processor state to resume the faulted instruction once the operating system has handled the exception.
• UNIX and UNIX-like operating systems report these conditions to the user with error messages such as " segmentation violation ", or " bus error ", and may also produce a core dump.
• The MMU may also generate illegal access error conditions or invalid page faults upon illegal or non-existing memory accesses, respectively, leading to segmentation fault or bus error conditions when handled by the operating system.
• SIGBUS can also be caused by any general device fault that the computer detects, though a bus error rarely means that the computer hardware is physically broken it is normally caused by a program's source code.
• These processors offload large portions of the I / O path length and recovery, and by fully isolating the main system from I / O faults, interrupts, bus errors, etc . greatly improve reliability and availability.
• To avoid problems with returns from coprocessor, bus error, and address error exceptions, it was generally necessary in a multiprocessor system for all CPUs to be the same model, and for all FPUs to be the same model as well.
• Vectors 3 through 15 are used to report various errors : bus error, address error, illegal instruction, zero division, CHK and CHK2 vector, privilege violation ( to block privilege escalation ), and some reserved vectors that became line 1010 emulator, line 1111 emulator, and hardware breakpoint.
• If the subsequent memory access causes an error ( e . g . page fault, bus error, address error ) leading to an interrupt, then restarting the instruction becomes much more problematic since one or more registers may need to be set back to the state they were in before the instruction originally started.
• Another type of memory access error is a bus error, which also has various causes, but is today much rarer; these occur primarily due to incorrect " physical " memory addressing, or due to misaligned memory access  these are memory references that the hardware " cannot " address, rather than references that a process is not " allowed " to address.